This invention relates to variable frequency oscillators used in imaging assemblies of electrophotographic printing machines.
Electrophotographic marking is a well-known, commonly used method of copying or printing documents. Electrophotographic marking is performed by exposing a charged photoreceptor with a light image representation of a desired document. The photoreceptor is discharged in response to that light image, creating an electrostatic latent image of the desired document on the photoreceptor""s surface. Toner particles are then deposited onto that latent image, forming a toner image, which is then transferred onto a substrate, such as a sheet of paper. The transferred toner image is then fused to the substrate, usually using heat and/or pressure, thereby creating a permanent record of the original representation. The surface of the photoreceptor is then cleaned of residual developing material and recharged in preparation for the production of other images.
The foregoing broadly describes a black and white electrophotographic printing machine. Electrophotographic marking can also produce color images by repeating the above process once for each color of toner that is used to make the composite color image. For example, in one color process, referred to herein as the REaD IOI process (Recharge, Expose, and Develop, Image On Image), a charged photoreceptive surface is exposed to a light image which represents a first color, say black. The resulting electrostatic latent image is then developed with black toner particles to produce a black toner image. The charge, expose, and develop process is repeated for a second color, say yellow, then for a third color, say magenta, and finally for a fourth color, say cyan. The various color images, and thus the various colors of toner particles, are placed in superimposed registration such that a desired composite color image results. That composite color image is then transferred and fused onto a substrate.
The REaD IOI process can be performed in various ways. For example, in a single pass printer wherein the composite image is produced in a single cycle of the photoreceptor. This requires a charging, an exposing, and a developing station for each color of toner. Single pass printers are advantageous in that they are relatively fast since a composite color image can be produced in one cycle of the photoreceptor. However, they are relatively expensive since multiple charging, exposing, and developing stations are required. An alternative process is to have the photoreceptor make multiple passes through the printer. During a first process the photoreceptor is exposed to produce a latent image for a first color (black) and that latent image is developed for that first color. During a second pass the exposure station exposes the photoreceptor to produce a latent image for a second color (yellow), and then that latent image is developed for second first color. The process continues for the third and fourth colors. In a multiple pass printer only one charging station and only one exposure station is required.
One way of exposing the photoreceptor is to use a Raster Output Scanner (ROS). A ROS is typically comprised of a laser source (or sources), a pre-polygon optical system, a rotating polygon having a plurality of mirrored facets, and a post-polygon optical system. In a simplified description of operation a collimated light beam is reflected from facets of an optical polygon and passes through imaging elements that project it into a finely focused spot of light on the photoreceptor surface. As the polygon rotates, the focused spot traces a path on the photoreceptor surface referred to as a scan line. By moving the photoreceptor as the polygon rotates the laser spot raster scans the surface of the photoreceptor. By modulating the laser beam with image information a predetermined latent image is produced on the photoreceptor.
Exposing the photoreceptor requires elements in addition to the basic raster output scanner described above. FIG. 1 illustrates a typical prior art imaging assembly 6 for exposing a photoreceptor. That assembly includes a laser diode 8 that emits a laser beam 10 that is modulated in response to drive signals from a controller 12 that are applied to the laser diode via a line 9. As emitted the laser beam 10 is divergent. A lens 14 collimates that diverging beam and directs the collimated beam through a cylindrical lens 16 that has focusing power only in the sagittal direction. After passing through the cylindrical lens 16 the laser beam is incident on a polygon 20 that includes a plurality of mirrored facets 22. The polygon is rotated at a constant rotational velocity by a motor (not shown) in a direction 24. The mirrored facets deflect the laser beam as the polygon rotates, resulting in a sweeping laser beam. A post-scan optical system 26 focuses the laser beam 10 to form a spot of circular or elliptic cross sectional shape on a moving photoreceptor 28. The post-scan optical system 26 is typically an F-theta lens design intended to correct for scan line nonlinearity (see below). In FIG. 1, the direction of photoreceptor motion would be into (or out of) the view plane. By properly modulating the laser beam 10 as the focused spot sweeps across the photoreceptor a desired latent image is produced. That latent image is comprised of multiple scan lines, each of which is comprised of a plurality of image elements referred to as pixels.
The imaging assembly of FIG. 1 also includes a start of scan detector 36. The start-of-scan detector 36 incorporates a fiber-optic element 44 that guides light received at its input end 46, which is in the scanning plane of the raster output scanner, to a photosensitive element (not shown). In response to a received light pulse produced by the sweeping scan line, the start-of-scan detector produces the start of scan signal on a line 38. That signal causes the raster output scanner to synchronize the laser diode modulation such that each scan line starts at the same distance from the edge of the photoreceptor 28.
In a single pass color printer there are four imaging assemblies. Ideally the four imaging assemblies produce geometrically straight scan lines having evenly spaced, identically sized pixels that result in scan lines of identical lengths which start at the same relative position on the photoreceptor. However, obtaining such scan lines from multiple imaging assemblies is very difficult. For example, manufacturing tolerances in producing and assembling exposure stations result in scan lines that, unless corrected, are shorter or longer than ideal. Other errors include, but are not limited to the following:
1. Changes in scan velocity during the scan. Given a uniform rotational velocity of the raster polygon, the ends of the scan line are scanned at a faster rate then at the center of the scan line (assuming that the polygon is centered on the photoreceptor). This is known as scan line non-linearity. It has the effect of displacing image information along the scan line from its desired location. While the F-theta post-scan optical system 26 reduces scan line non-linearity, in a typical system non-linearity errors of +2 pixels are common.
2. Facet to facet jitter. Each facet of the polygon may have slight imperfections that cause the laser beam to have shorter or longer flight times compared to the other facets. In a typical system, with the scan lines synchronized by the Start-of-Scan signal, the ends of the scan lines receive the full effect of the facet to facet imperfections. In a typical imaging assembly errors of +xc2xd pixels are common.
3. Misalignment of an imaging assembly with the photoreceptor. This causes the scan line length to vary and also produces scan line nonlinearities. While scan line nonlinearities can be improved by changing the average frequency of the pixel clock, known as Magnification Correction, there remains a residual error known as Keystoning that can add +1 pixels of non-linearity to the scan.
Without correction the foregoing errors result in color mis-registration and color distortion. Scan lines that are longer or shorter than ideal are akin to fast scan direction magnification errors. In the prior art, such magnification errors were compensated for using a variable frequency pixel clock. If the pixel clock frequency for each imaging assembly is properly adjusted it is possible to compensate for magnification errors such that each scan line has substantially the same length and such that the pixel spacing is relatively uniform.
In the prior art imaging assembly of FIG. 1 the controller 12 includes a variable frequency phase-locked pixel clock 31. The pixel clock is beneficially controlled such that the scan lines are linear and have lengths that are substantially close to ideal. While variable frequency phase-locked pixel clocks can successfully correct relatively large errors, they have less success correcting for small errors or for making fine scan line length adjustments. This is partially because correcting small errors requires difficult-to-achieve small pixel clock frequency adjustments. Unfortunately, correcting small errors in the scan line is important for high quality color imaging. Therefore, a new imaging assembly having a variable frequency pixel clock that is capable of small frequency adjustments would be beneficial. Even more beneficial would be a new electrophotographic printer having imaging assemblies that include a variable frequency pixel clock that is capable of small, rapid frequency adjustments such that the resulting scan lines are linear and have lengths that are of a predetermined length.
The principles of the present invention provide for a Direct Digital Synthesis pixel clock generator for use in imaging assemblies of electrophotographic printers. Imaging assemblies that incorporate such generators can produce linear scan lines. Furthermore, such imaging assemblies are particularly beneficial when multiple scan line images produced by multiple imaging assemblies must be carefully registered.
A first Direct Digital Synthesis pixel clock generator includes a controller that receives a start-of-scan signal and a facet 0 signal. In response the controller sends a prestored frequency control word to a Direct Digital Synthesis Oscillator. The Direct Digital Synthesis Oscillator begins sends pulses, at a frequency that depends on the frequency control word, to a Digital Phase Shift Circuit. The controller also applies a sequence of delay profile words to the Digital Phase Shift Circuit. Each delay profile word causes the Digital Phase Shift Circuit to delay a contemporaneous pulse from the Direct Digital Synthesis Oscillator between 0xc2x0 and 360xc2x0 degrees, with the actual delay depending upon the delay profile word. A sequence of delay profile words exist for each facet, with one word for each pixel. The delay profile words are selected such that the pixels that make up each scan line are xe2x80x9cadjustedxe2x80x9d in position such that the resulting scan line is comprised of linearly spaced pixels. The delayed pulses are applied to a phase-locked-loop circuit that multiplies its input frequency by N, where N is an integer. The phase-locked-loop circuit integrates and smoothes the frequency step changes. The output of the phase-locked loop circuit is then applied to a synchronizer that synchronizes the pixel clocks with the start-of-scan such that the pixels clocks start each scan line at the proper location.
An alternative Direct Digital Synthesis pixel clock generator includes a controller that receives a start-of-scan signal and a facet 0 signal. Based on those signals the controller applies a sequence of frequency profile words to a Direct Digital Synthesis Oscillator. A sequence of frequency profile words exist for each facet, with one word for each pixel. In turn, the Direct Digital Synthesis Oscillator generates pulses at a rate that depends upon the applied frequency profile word. Each frequency profile word is selected such that the pixel that corresponds to that frequency profile word is xe2x80x9cadjustedxe2x80x9d in position such that the resulting scan line is comprised of linearly spaced pixels. The output of the Direct Digital Synthesis Oscillator is applied to a phase-locked-loop circuit that multiplies its input frequency by N, where N is an integer. The phase-locked circuit has integrates and smoothes the frequency step changes from by the Direct Digital Synthesis Oscillator. The resulting pulse frequency is applied to a synchronizing circuit that synchronizes the pixel clocks with the start-of-scan such that the pixels clocks start each scan line at the proper location.